Disk drives are well known components of computer systems. One type of disk drive which is commonly used in computer systems is a Direct Access Storage Device (DASD).
FIG. 1 is a block diagram illustrating a conventional system with a DASD. The system 100 comprises a host 102 which exchanges data via connection 104 with the DASD 106. The DASD 106 comprises Drive Electronics 108, Arm Electronics 110 (AE), and a Head and Disk Assembly 112. The AE 110 is generically referred to by many in the art as a "pre-amp chip".
FIG. 2 is a block diagram illustrating the AE 110 and the Head and Disk Assembly 112 in more detail. The Head and Disk Assembly 112 comprises a plurality of disks 114 for storing data, a Spindle Motor 116 which controls the speed at which each disk 114 spins, connections 117 between the AE 110 and the Head and Disk Assembly 112, and heads 118(a)-118(f). There is one pair of heads 118(a)-118(f) for each disk 114, one head for each surface of the disk. The heads 118(a)-118(f) read data from and write data to their respective disks. The heads 118(a)-118(f) are positioned over specific tracks on the disks 114 by a Head Positioning Motor 120. Both the Head Positioning Motor 120 and the Spindle Motor 116 are controlled by signals to and from a Positioning Control Unit 150. The AE 110 also communicates with the Drive Electronics 108.
There is a continuing demand in the industry for the data transfer rate from the disks 114 to the Drive Electronics 108 to be faster. One way to accomplish this is to use a BiCMOS4S chip, developed by INTERNATIONAL BUSINESS MACHINES CORPORATION, as the AE 110. The BiCMOS4S chip uses a silicon technology which allows for a fast data transfer rate. The BiCMOS4S silicon technology is well known in the art and will not be discussed in detail here.
However, the architecture of the BiCMOS4S chip negatively biases the substrate and imposes a voltage limit on its components. The chip is charged at a positive Vcc, for example of +5V, and a Vee below ground, for example of -4V. Vcc represents the voltage from a positive power supply; Vee represents the voltage from a negative power supply. The voltage limit on the chip components is Vcc-Vee. This creates a problem when a signal from the chip is to be driven off-chip to devices which use standard Transistor Transistor Logic (TTL) logic levels. Standard TTL-compatible devices are typically designed to function at a positive Vcc and ground. This problem is compounded by the fact that components used within the chip are also designed to function within a chip charged at a positive Vcc and ground.
Accordingly, there exists a need for a method and system for translating a signal from a chip with a negative substrate bias. The method and system should translate the signal such that it is compatible with standard TTL logic levels. The present invention addresses such a need.